Well... ehm... I hate to counterspeak the designer but I struggled a lot in P&Ping a 0.5mm pitch TQFP. Now it's (mostly) running perfect. What I did was the following:
1. in pcb design I put the 0 point of the board to one of the 2 fiducials.
2. in Vission placer search for the 0 point, and do a 'vission test' several times
3. mark the 0 point of the board in PBC edit with Cx/Cy
4. MARK 1 has coordinates 0/0 (of course)
5. MARK 2 has coordinates as in PCB file

An other thing which made the whole thing go wrong was simply a wrong stencil. The gaps for each SMD pad was too big and stencil was too thick. So too many solder past which made the compent slide of it's landing pattern. Also a lot of short circuits due to too many solder paste. Anyhow the above setup gives very good placement results.

JanDC, nice method. I thought about this. Soon I will try to collect boards.
But basically my boards are a panel of several boards. And on each of them the placement is slightly different. Because in my opinion the main purpose of the marker points is not used. I have never been able to get my message across to Michael in previous posts.

The first test I did with 'my' procedure was on a 1x3 panel, last week I did a 2x2 panel. Preferably mark test is done on each board, so not only the panel. Unfortunately for the 2x2 board I only had fiducials in the border of the panel.

A mark test per board definately gives better results but even a proper setup of the panel it's ok. I typically use fiducials in the outer most oposite corners.